K. Cheng, Chanro Park, Heng Wu, Juntao Li, S. Nguyen, Jingyun Zhang, Miaomiao Wang, S. Mehta, Zuoguang Liu, R. Conti, N. Loubet, J. Frougier, A. Greene, T. Yamashita, B. Haran, R. Divakaruni
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引用次数: 5
Abstract
We report an improved air spacer that is successfully co-integrated on FinFET transistors with Self-Aligned Contacts (SAC) and Contacts Over Active Gate (COAG). The new integration scheme enables air spacer formation agnostic to the underlying transistor architecture, thus paving the way for a seamless adoption of air spacer in FinFET and Gate-All-Around (GAA) technologies. A reduction in effective capacitance $(C_{\mathrm{eff}})$ by 15% is experimentally demonstrated. The power/performance benefits achieved by the new air spacer exceeds the benefits of scaling FinFET from 7nm node to 5nm node.