Design of a BiCMOS constant-g/sub m/ rail-to-rail operational amplifier for low-voltage applications

Shu-Chuan Huang, Chin Chang
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引用次数: 2

Abstract

This paper presents a BiCMOS rail-to-rail operational amplifier for low-voltage applications. CMOS differential pairs are used for the input stage to achieve high input impedances. The BJT translinear principle is then employed in the design of a constant-g/sub m/ circuit to control the tail currents of the complementary differential pairs properly. Mismatching between K/sub n/ and K/sub p/ is compensated by a a K/sub n/-K/sub p/ matching circuit employing the MOS translinear principle. The resulting variation of the total g/sub m/ is within 13% according to the simulation. The output stage is also rail-to-rail with a class AB control. When configured as a unity-gain buffer with a 10 kHz sinusoidal wave applied, the total harmonic distortion simulated from SPICE is less than 0.06% with the input amplitude less than 1.4 V and 0.114% at 1.5 V. This op amp will be fabricated in a CMP/AMS 0.8 /spl mu/m DPDM BiCMOS process, and the experimental results will be reported later.
用于低压应用的BiCMOS恒g/sub - m/轨对轨运算放大器的设计
本文提出了一种用于低压应用的BiCMOS轨对轨运算放大器。CMOS差分对用于输入级,以实现高输入阻抗。然后利用BJT跨线性原理设计了恒g/sub /电路,以适当地控制互补差分对的尾电流。K/sub n/和K/sub p/之间的不匹配由一个采用MOS跨线性原理的K/sub n/-K/sub p/匹配电路补偿。模拟结果表明,总g/sub m/的变化在13%以内。输出级也是轨对轨与AB类控制。当配置为单位增益缓冲并施加10 kHz正弦波时,SPICE模拟的总谐波失真在输入幅度小于1.4 V时小于0.06%,在1.5 V时为0.114%。该运放将采用CMP/AMS 0.8 /spl mu/m DPDM BiCMOS工艺制作,实验结果将在稍后报告。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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