Thin-Film Magnetic Inductor Design Strategy for Integrated Voltage Regulator

S. Raju, Narasimman Neelakantan, Serine Soh, D. Ho, R. Singh
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Abstract

The optimal design of thin-film magnetic inductor is important to realize efficient fully Integrated Voltage Regulators (IVR). This work describes the origin of the power losses within inductor while switching at high frequency, and proposes an inductor selection strategy that is able to maximize efficiency for a desired operating condition. The optimization strategy was employed to design an inductor for IVR application which is switching at 50 MHz. To show the effectiveness of the proposed strategy, the thin-film magnetic inductor was fabricated and integrated with CMOS ASIC to realize an 8-phase IVR that yielded a peak efficiency of 85% over a wide load range of 1.5 A.
集成调压器的薄膜磁感应设计策略
薄膜磁电感器的优化设计是实现高效全集成稳压器的关键。这项工作描述了在高频开关时电感内部功率损耗的来源,并提出了一种能够在期望的工作条件下最大化效率的电感选择策略。采用该优化策略设计了一种50 MHz切换频率的IVR电感器。为了证明所提出策略的有效性,制作了薄膜磁电感器并将其集成到CMOS ASIC中,实现了在1.5 a宽负载范围内产生85%峰值效率的8相IVR。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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