15-nm-thick Si channel wall vertical double-gate MOSFET

Abstract

Double-gate (DG) MOSFET structures have been regarded as promising candidates for scalable CMOS devices. Among DG concept devices, a vertical type has attracted considerable attention due to its process compatibility with conventional CMOS technology and its suitability with bulk Si substrates. The critical issue is fabrication technology, especially for the ultra-thin Si wall for the vertical transistor. This paper demonstrates, for the first time, vertical DG MOSFETs ('IMOSFETs') with a 15-nm-thick channel wall fabricated by using the newly-discovered ion-bombardment-retarded etching (IBRE) of Si in a tetramethylammonium hydroxide (TMAH) solution.