Evaluation of Residual Stress of Embedded Die Substrate with Hollow Structure for Heterogeneous Integration

Abstract

The residual stress in a silicon die of an embedded die substrate having a hollow structure was investigated. A silicon chip in which piezo-resistance gauges were fabricated was embedded in a hollow chamber inside of the substrate by using a newly developed process technology. The chip was mechanically held with dielectric epoxy resin at the periphery of the chip. Two kinds of the resin having a different coefficient of thermal expansion (CTE) were tested. The residual stress was measured at each critical manufacturing step. The stress was reduced after the formation of the hollow structure. The symmetric structure enabled to minimize the process-induced stress. The use of low CTE resin showed low residual stress.