Comparison analysis of various R2R D/A converter

Abstract

Most of the modern wireless communication systems require a wireless frequency (RF) subsystem.1 The design of RF system consists of various components ranging from connecting modules to power supply, antenna, baseband layer, and other interfaces, constitute a radio system.2‒4 The main front end radio transmitter module consists of digital signal processor which processes the input digital signal to analog output signal and vice versa. In other words, a discrete-amplitude; discrete-time digital input signal is converted into a continuous-amplitude, continuous-time analog counterpart. In most of the cases the input digital signal is a binary-coded representation of an analog signal using N bits. The leftmost bit of the input digital word is usually called the most-significant bit (MSB), and the rightmost bit is called the least-significant bit (LSB).5‒7 Now with the advancements in VLSI technologies CMOS based current mode DACs are the very much for many applications. The main features of CMOS like their high speed, low power, and cost effectiveness enable it successful for the implementations in designing of circuits.8‒10 Nevertheless the digital to analog converter (DAC ) can equally be used as a standalone chip for SoCs. There are several digital to analog architectures for DAC designs which includes resistor string, R2R ladder networks, charge scaling, current steering, and segmented current steering.11‒13 Common problem with DAC to avoid glitches because of the rapid change of more than one digital input bit at a sampling time causes noise problems since resistors are noise sources. Because of which DAC output dose not result in expected value.14‒17 In this research studies a comparative R2R DAC using various CMOS topologies has been presented. It is well known fact that the binary weighted resistor D/A converted requires a wide range of resistance value and matched switch for each bit position.18‒22 The R2R D/A converter with an R-2R ladder network which eliminates these complications at the expense of an additional resistor for each bit is shown in Figure 1. Bit MSB and LSB are driven from logic gates. The operation of this converter can be considering the weights of different bits one at a time. This can be followed by superposition to construct analog output corresponding to any digital input word.