A Digital Synthesizable Full Common-mode Input Range Dynamic Voltage Comparator

Min Li, Jue Wang, Xu Cheng, Jun Han, Xiaoyang Zeng
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引用次数: 1

Abstract

This paper presents a digital synthesizable full common-mode input range dynamic voltage comparator (FCMRDVC). It is a modified version of the rail-to-rail dynamic voltage comparator (RRDVC), with a view to a real rail-to-rail common-mode input range (CMR). The proposed FCMRDVC is designed and synthesized in 28-nm CMOS technology with the active area of 43.2µm2, and the simulation results show the maximum power consumption of 7.5nW under 0.3V power supply voltage (VDD) and CMR of 0-VDD.
一种数字合成全共模输入范围动态电压比较器
提出了一种数字合成全共模输入范围动态电压比较器(FCMRDVC)。它是轨对轨动态电压比较器(RRDVC)的改进版本,旨在实现真正的轨对轨共模输入范围(CMR)。采用28纳米CMOS工艺设计并合成了FCMRDVC,其有效面积为43.2µm2,仿真结果表明,在0.3V电源电压(VDD)和0-VDD CMR下,其最大功耗为7.5nW。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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