A simple model-base prediction method for delamination failures in Low-k/cu interconnects with flip chip packages

Abstract

A model-base prediction method is proposed for delamination/cracking failures in Low-k/Cu interconnects with Pb-free FCBGA (Flip Chip-Ball Grid Array). The low-k failure under the solder bump, so called as a white bump (WB) failure, is caused by large thermal stress to a brittle low-k film during the cooling process from high reflow temperature for the Pb-free solder. Based on failure analysis using several low-k films and several packaging materials/structures, we found that occurrence of the WB failure is able to be predicted by a simple evaluation function of the simulated strain energy and a critical energy release rate of crack, which is defined by the fracture toughness and the adhesion-strength of the low-k film. According to this method, we can lead a preliminary design guideline on the bump pitch/structure or the interposer material/structure toward no WE failure quickly.