{"title":"The Digital Twin: Virtual Validation In Electronics Development And Design","authors":"Dwight Howard","doi":"10.23919/PANPACIFIC.2019.8696712","DOIUrl":null,"url":null,"abstract":"Product development is increasingly challenging. Competition demands that ideas be evolved from concept to products shipping into the marketplace in the shortest possible time. Markets are demanding more from technologies. To meet these demands, engineers must utilize the most advanced capabilities that are available. Engineers must minimize time and cost to speed design, development, validation and release to manufacturing. increasing complexities in physical products. Electronics has led the way in feature growth and complexities. Additionally, software magnifies complexities exponentially. Traditional methods of bringing products from concept to production cannot provide the means engineers need to meet the challenges. Computer-based models of physical hardware are critical to meeting current and future challenges. This presentation discusses the promise of the so-called “Digital Twin” and how it may facilitate virtual validation of hardware to facilitate rapid development at least cost in time and manpower while achieving optimized designs by way of “virtual validation”. Discussion regarding digital twins has risen to the forefront as the way of the future. This paper will also identify primary challenges that proponents and visionaries of this concept have cited as the major hurtles that must be overcome.","PeriodicalId":6747,"journal":{"name":"2019 Pan Pacific Microelectronics Symposium (Pan Pacific)","volume":"26 1","pages":"1-9"},"PeriodicalIF":0.0000,"publicationDate":"2019-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"17","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 Pan Pacific Microelectronics Symposium (Pan Pacific)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.23919/PANPACIFIC.2019.8696712","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 17
Abstract
Product development is increasingly challenging. Competition demands that ideas be evolved from concept to products shipping into the marketplace in the shortest possible time. Markets are demanding more from technologies. To meet these demands, engineers must utilize the most advanced capabilities that are available. Engineers must minimize time and cost to speed design, development, validation and release to manufacturing. increasing complexities in physical products. Electronics has led the way in feature growth and complexities. Additionally, software magnifies complexities exponentially. Traditional methods of bringing products from concept to production cannot provide the means engineers need to meet the challenges. Computer-based models of physical hardware are critical to meeting current and future challenges. This presentation discusses the promise of the so-called “Digital Twin” and how it may facilitate virtual validation of hardware to facilitate rapid development at least cost in time and manpower while achieving optimized designs by way of “virtual validation”. Discussion regarding digital twins has risen to the forefront as the way of the future. This paper will also identify primary challenges that proponents and visionaries of this concept have cited as the major hurtles that must be overcome.