{"title":"Programmable Gain and Bandwidth Op-Amp Using Controllable Input Stage Tail Current","authors":"Muhaned Zaidi, I. Grout, Abu Khari A'ain","doi":"10.1109/IEECON.2018.8712233","DOIUrl":null,"url":null,"abstract":"This paper presents a novel technique to design a programmable open-loop DC gain and bandwidth single-ended output CMOS (complementary metal oxide semiconductor) opamp (operational amplifier) using a serial digital interface. The circuit topology allows for the programming of the differential input stage tail current. With this variable tail current, a controllable open-loop DC gain and frequency response is created that can be controlled from a host digital processor. The op-amp circuit has a rail-to-rail output where the first stage of the op-amp consists of differential input and folded-cascode circuits that are compensated using a negative Miller capacitor, and the second stage is a class-AB amplifier compensated by a conventional Miller capacitor. The op-amp has been designed using a $0.35\\ \\mu \\mathrm{m}$ CMOS technology, its operation simulated using the Cadence Spectre simulator and operates on a single-rail +3.3V power supply.","PeriodicalId":6628,"journal":{"name":"2018 International Electrical Engineering Congress (iEECON)","volume":"38 1","pages":"1-4"},"PeriodicalIF":0.0000,"publicationDate":"2018-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 International Electrical Engineering Congress (iEECON)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IEECON.2018.8712233","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
This paper presents a novel technique to design a programmable open-loop DC gain and bandwidth single-ended output CMOS (complementary metal oxide semiconductor) opamp (operational amplifier) using a serial digital interface. The circuit topology allows for the programming of the differential input stage tail current. With this variable tail current, a controllable open-loop DC gain and frequency response is created that can be controlled from a host digital processor. The op-amp circuit has a rail-to-rail output where the first stage of the op-amp consists of differential input and folded-cascode circuits that are compensated using a negative Miller capacitor, and the second stage is a class-AB amplifier compensated by a conventional Miller capacitor. The op-amp has been designed using a $0.35\ \mu \mathrm{m}$ CMOS technology, its operation simulated using the Cadence Spectre simulator and operates on a single-rail +3.3V power supply.