{"title":"3D-MiM (MUST-in-MUST) Technology for Advanced System Integration","authors":"A. Su, T. Ku, C. Tsai, K. Yee, Douglas C. H. Yu","doi":"10.1109/ECTC.2019.00008","DOIUrl":null,"url":null,"abstract":"An advanced 3D Multi-stack (MUST) system integration technology, 3D MUST-in-MUST (3D-MiM) fan out package, has been developed as next generation wafer-level fan-out package technology. 3D-MiM technology utilizes a more simplified architecture which eliminates BGAs between packages for system-level performance, power and form-factor (PPA) purpose. This technology also makes use of a modularized approach for both design and integration flow to improve design flexibility and integration efficiency. Known-good pre-stacked memory cube and/or logic-memory cubes are fabricated by leveraging the established integrated fan-out technology platform (InFO) in tools, materials, design rules, and processes to shorten development cycle time and achieve cost effectiveness. Two 3D-MiM fan-out examples are presented in this paper. The first 3D-MiM package integrates a SoC with 16 memory chips in a 15x15 mm2 footprint with 0.5 mm package height (final BGA included) for mobile application. The other 3D-MiM package integrates 8 SoCs with 32 memory chips in a 43x28 mm2 footprint to mimic a system integration of multiple logic cores and multiple memory chips for HPC applications.","PeriodicalId":6726,"journal":{"name":"2019 IEEE 69th Electronic Components and Technology Conference (ECTC)","volume":"69 1","pages":"1-6"},"PeriodicalIF":0.0000,"publicationDate":"2019-05-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"7","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 IEEE 69th Electronic Components and Technology Conference (ECTC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ECTC.2019.00008","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 7
Abstract
An advanced 3D Multi-stack (MUST) system integration technology, 3D MUST-in-MUST (3D-MiM) fan out package, has been developed as next generation wafer-level fan-out package technology. 3D-MiM technology utilizes a more simplified architecture which eliminates BGAs between packages for system-level performance, power and form-factor (PPA) purpose. This technology also makes use of a modularized approach for both design and integration flow to improve design flexibility and integration efficiency. Known-good pre-stacked memory cube and/or logic-memory cubes are fabricated by leveraging the established integrated fan-out technology platform (InFO) in tools, materials, design rules, and processes to shorten development cycle time and achieve cost effectiveness. Two 3D-MiM fan-out examples are presented in this paper. The first 3D-MiM package integrates a SoC with 16 memory chips in a 15x15 mm2 footprint with 0.5 mm package height (final BGA included) for mobile application. The other 3D-MiM package integrates 8 SoCs with 32 memory chips in a 43x28 mm2 footprint to mimic a system integration of multiple logic cores and multiple memory chips for HPC applications.