Chia-Jen Liang, Ching-Wen Chiang, Jia Zhou, R. Huang, K. Wen, Mau-Chung Frank Chang, Yen-Cheng Kuan
{"title":"A Tri (K/Ka/V)-Band Monolithic CMOS Low Noise Amplifier with Shared Signal Path and Variable Gains","authors":"Chia-Jen Liang, Ching-Wen Chiang, Jia Zhou, R. Huang, K. Wen, Mau-Chung Frank Chang, Yen-Cheng Kuan","doi":"10.1109/IMS30576.2020.9223850","DOIUrl":null,"url":null,"abstract":"This paper presents a single-signal-path tri-band (K/Ka/V) variable-gain low noise amplifier (LNA) fabricated in 28-nm bulk CMOS technology. This LNA uses a common-gate input stage with a triple-coupling transformer (TCT) to achieve better impedance matching across three desired bands than those of prior arts and to enable the necessary gm-boosting to suppress undesired noise. Each LNA stage (except the final one) is loaded with a PMOS switched inductor carefully designed to trade off parasitic capacitances/resistances between off/on states. PMOS devices are also used in parallel with switched inductors as variable resistors to realize the variable gain functionality. Accordingly, the load quality factors can be changed to make the LNA power gain adjustable. This LNA consists of six stages and offers variable power gains from -5.5 to 29.9 dB (24 GHz), -5.5 to 32.4 dB (33 GHz), and -11.5 to 22.2 dB (50 GHz) with respective minimum noise figures of 5.63 dB, 4.55 dB, and 5.96 dB. This LNA consumes 25.6 mW from a 1-V supply and occupies 0.22 mm2 without pads in silicon area.","PeriodicalId":6784,"journal":{"name":"2020 IEEE/MTT-S International Microwave Symposium (IMS)","volume":"25 1","pages":"333-336"},"PeriodicalIF":0.0000,"publicationDate":"2020-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"10","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 IEEE/MTT-S International Microwave Symposium (IMS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IMS30576.2020.9223850","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 10
Abstract
This paper presents a single-signal-path tri-band (K/Ka/V) variable-gain low noise amplifier (LNA) fabricated in 28-nm bulk CMOS technology. This LNA uses a common-gate input stage with a triple-coupling transformer (TCT) to achieve better impedance matching across three desired bands than those of prior arts and to enable the necessary gm-boosting to suppress undesired noise. Each LNA stage (except the final one) is loaded with a PMOS switched inductor carefully designed to trade off parasitic capacitances/resistances between off/on states. PMOS devices are also used in parallel with switched inductors as variable resistors to realize the variable gain functionality. Accordingly, the load quality factors can be changed to make the LNA power gain adjustable. This LNA consists of six stages and offers variable power gains from -5.5 to 29.9 dB (24 GHz), -5.5 to 32.4 dB (33 GHz), and -11.5 to 22.2 dB (50 GHz) with respective minimum noise figures of 5.63 dB, 4.55 dB, and 5.96 dB. This LNA consumes 25.6 mW from a 1-V supply and occupies 0.22 mm2 without pads in silicon area.