Low temperature Topographically Selective Deposition by Plasma Enhanced Atomic Layer Deposition with ion bombardment assistance

Taguhi Yeghoyan, V. Pesce, Moustapha Jaffal, G. Lefévre, R. Gassilloud, N. Possémé, M. Bonvalot, C. Vallée
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引用次数: 1

Abstract

Area selective deposition via atomic layer deposition (ALD) has proven its utility in elementary nanopatterning processes. In the case of complex 3D patterned substrates, selective deposition processes lead to vertical sidewall coverage only, or top and bottom horizontal surface coverage only, to enable advanced nanopatterning and further miniaturization of microelectronic devices. While many fabrication strategies for vertical only Topographically Selective Deposition (TSD) have already been developed, the horizontal TSD case needs further attention. In this work, we propose a versatile route for the TSD on 3D top and bottom horizontal surfaces along with a proof-of-concept for such selective Ta2O5 thin film deposition. The strategy at stake relies on a plasma enhanced atomic layer deposition process assisted by energetic ion bombardment during the plasma step and followed by a postgrowth wet etching step. The effectiveness of this strategy is based on a careful adjustment of processing temperatures purposely set at low temperature, most probably below the ALD temperature window. Anisotropic ion bombardment via substrate biasing during the plasma step provides an extra amount of thermal energy only to exposed horizontal surfaces, which in turn enables a selective densification of the thin film under growth. The difference in thin film density on horizontal and vertical surfaces enables the property-selective etching of vertical surfaces, generating horizontal TSD. A proof-of-concept for such low temperature TSD is shown in the case of 3D trenched substrates with an aspect ratio of 14.
离子轰击辅助下等离子体增强原子层沉积的低温选择性沉积
通过原子层沉积(ALD)的区域选择性沉积已经证明了它在基本纳米图工艺中的实用性。在复杂的3D图案衬底的情况下,选择性沉积过程导致仅垂直侧壁覆盖,或仅上下水平表面覆盖,以实现先进的纳米图案和微电子设备的进一步小型化。虽然已经开发了许多仅用于垂直形貌选择性沉积(TSD)的制造策略,但水平形貌选择性沉积(TSD)的情况需要进一步关注。在这项工作中,我们提出了一种在3D上下水平表面上进行TSD的通用路线,并对这种选择性Ta2O5薄膜沉积进行了概念验证。该策略依赖于等离子体增强原子层沉积过程,在等离子体步骤期间由高能离子轰击辅助,然后是生长后湿蚀刻步骤。这种策略的有效性是基于精心调整加工温度,故意设置在低温下,最有可能低于ALD温度窗口。在等离子体步骤中,通过衬底偏置的各向异性离子轰击仅为暴露的水平表面提供了额外的热能,这反过来又使薄膜在生长过程中选择性致密化。水平和垂直表面上薄膜密度的差异使垂直表面的性能选择性蚀刻成为可能,从而产生水平TSD。这种低温TSD的概念验证显示在长宽比为14的3D沟槽基板的情况下。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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