Design and implementation of 4-bit ripple carry adder using SETMOS architecture

Abstract

Adder circuit is one of the basic building block of digital data processing circuits. Performance of a digital processing system can be improved by designing high performance adder circuit. Replacing the conventional Metal Oxide Semiconductor Field Effect Transistor (MOSFET) technology by hybrid approach of Single Electron Transistor (SET) and MOSFET technology will enhance the overall performance of the system. A hybrid approach of SET and MOSFET can take the advantage of both the technologies and improve the performance of the circuit. The paper presents the design of 4 bit Ripple Carry Adder (RCA) using SET-MOS hybrid approach. The circuit is implemented using MIB model and a BSIM 4.6 model and the result is verified using Tenner spice simulator.