Enabling UTBB Strained SOI Platform for Co-integration of Logic and RF: Implant-Induced Strain Relaxation and Comb-like Device Architecture

Abstract

For the first time, ion implant was used to partially relax the tensile strain by half in the fully-depleted (FD) strained SOI (SSOl) so that SiGe pFETs with a higher compressive strain can be realized at a fixed Ge composition. This enables the co-integration of highly tensile-strained Si nFETs and compressive-strained SiGe pFETs on the same substrate, achieving significant improvement in electrical performance over the unstrained counterpart verified by both experiment and simulation results. We also propose a Comb-like strained SOI architecture to further boost RF performance, demonstrating peak $G_{\mathrm{m}}$ improved by 47% over unstrained n-type FinFET SOI, as well as an improvement of 22% and 36% for $f_{\mathrm{T}}$ and $f_{\max}$, respectively, over n-type FinFETs SSOI.