A Calibration Technique for DVMC with Delay Time Controllable Inverter

Q4 Engineering
Ri Cui, K. Namba
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引用次数: 2

Abstract

: This paper presents a novel calibration method for Delay Value Measurement Circuit (DVMC), a class of embedded time to digital converter (TDC), using a variable clock generator for accurate delay measurement. The proposed method uses a design for calibration as well as a variable clock generator. The design utilizes a delay time controllable (DTC) inverter. It also uses two OR-NAND gates which work as selectors; we reconfigure the construction of the ring oscillator (RO) in DVMC when calibrating the DTC inverter. The proposed scheme accomplishes more accurate calibration compared to the traditional calibration which only uses the variable clock generator. For example, when using a variable clock generator with the resolution of 5.2ps, the resolution of the proposed method is 0.58ps while the traditional method is 5.2ps.
时延可控逆变器DVMC的标定技术
本文提出了一种新的延迟值测量电路(DVMC)的校准方法,该电路是一类嵌入式时数字转换器(TDC),使用可变时钟发生器进行精确的延迟测量。该方法采用了一种校准设计和一个可变时钟发生器。该设计采用延时可控(DTC)逆变器。它还使用两个OR-NAND门作为选择器;在标定DTC逆变器时,对DVMC中环形振荡器(RO)的结构进行了重新配置。与仅使用可变时钟发生器的传统校准方法相比,该方法实现了更精确的校准。例如,当使用分辨率为5.2ps的可变时钟发生器时,本文方法的分辨率为0.58ps,而传统方法的分辨率为5.2ps。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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来源期刊
IPSJ Transactions on System LSI Design Methodology
IPSJ Transactions on System LSI Design Methodology Engineering-Electrical and Electronic Engineering
CiteScore
1.20
自引率
0.00%
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0
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