{"title":"Novel Complete Passive Equivalent Circuit Model of the Practical 4-OTA-Based Floating Inductor","authors":"R. Banchuin, B. Chipipop, B. Sirinaovakul","doi":"10.1109/SIPS.2007.4387589","DOIUrl":null,"url":null,"abstract":"In this research, the practical 4-OTA-based floating inductor based upon the often cited monolithic CMOS technology has been studied and its complete passive equivalent circuit model, where the effects of both parasitic elements and finite opened-loop bandwidth have been taken into account, has been proposed. The accuracy evaluation of the proposed model has also been performed. The resulting model has been found to be excellently accurate with a considerably very small average error. Furthermore, the further study which is the inclusion of the mismatches among OTAs in order to obtain the most accurate results has also been proposed. However, the proposed passive equivalent circuit model has been found to be a convenience tool for the design of any signal processing circuits which require the CMOS-OTA-based floating inductors due to its considerably very small average error and the nature of the monolithic CMOS technology which allows the exclusion of the mismatches among OTAs.","PeriodicalId":93225,"journal":{"name":"Proceedings. IEEE Workshop on Signal Processing Systems (2007-2014)","volume":"93 1","pages":"447-451"},"PeriodicalIF":0.0000,"publicationDate":"2007-11-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings. IEEE Workshop on Signal Processing Systems (2007-2014)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SIPS.2007.4387589","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
In this research, the practical 4-OTA-based floating inductor based upon the often cited monolithic CMOS technology has been studied and its complete passive equivalent circuit model, where the effects of both parasitic elements and finite opened-loop bandwidth have been taken into account, has been proposed. The accuracy evaluation of the proposed model has also been performed. The resulting model has been found to be excellently accurate with a considerably very small average error. Furthermore, the further study which is the inclusion of the mismatches among OTAs in order to obtain the most accurate results has also been proposed. However, the proposed passive equivalent circuit model has been found to be a convenience tool for the design of any signal processing circuits which require the CMOS-OTA-based floating inductors due to its considerably very small average error and the nature of the monolithic CMOS technology which allows the exclusion of the mismatches among OTAs.