Multipurpose quick 3D packaging process

Abstract

A novel small-sized chip circuit auxiliary layer (SCCAL) multipurpose 3D package process in order to solve the problem of shortages in flexibility and diversity of the traditional through-silicon via (TSV) process is presented in this paper. It meets the requirement of large amount of silicon dies which need connecting together by TSV technology but were designed respectively that wafers were processed without via holes drilling. This process involves a small-sized chip circuit auxiliary layer which is used as a carrying base and connecting auxiliary layer. Also, an improved TSV technology is involved that via holes could be produced through the PADs in the silicon dies. It is verified that, the whole process time of 3D packaging process is shortened drastically and the flexibility of the 3D packaging is greatly improved.