A bidirectional neural interface IC with high voltage compliance and spectral separation

Michael Haas, U. Bihr, J. Anders, M. Ortmanns
{"title":"A bidirectional neural interface IC with high voltage compliance and spectral separation","authors":"Michael Haas, U. Bihr, J. Anders, M. Ortmanns","doi":"10.1109/ISCAS.2016.7539160","DOIUrl":null,"url":null,"abstract":"This paper presents a fully integrated, bidirectional, neural interface, which is composed of a high voltage (HV) stimulator and a low voltage (LV) neural front-end with active, spectral separation. The stimulator uses a supply of ±9V in order to achieve a high voltage compliance (VC), whereas the recorder has a supply voltage of 3 V for high power efficiency. By using a HV transistor to separate the two parts, a safe operation of stimulator and recorder with different supply voltages can be guaranteed. Thereby the presented architecture can deliver a maximum stimulation current of ±10mA with a dynamic range of 50 dB and a VC of ±8.2 V. The implemented recording part consumes 52 μW and achieves a simulated input referred noise of 2.5μVrms in the low frequency band from 0.1 Hz to 200 Hz and 3.1 μVrms in the high frequency band from 200 Hz to 7.5 kHz. The combined recorder/stimulator requires 0.378 mm2 per channel. A prototype of the interface has been implemented and manufactured in a standard 0.18 μm HV CMOS technology.","PeriodicalId":6546,"journal":{"name":"2016 IEEE International Symposium on Circuits and Systems (ISCAS)","volume":"53 1","pages":"2743-2746"},"PeriodicalIF":0.0000,"publicationDate":"2016-05-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"7","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 IEEE International Symposium on Circuits and Systems (ISCAS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISCAS.2016.7539160","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 7

Abstract

This paper presents a fully integrated, bidirectional, neural interface, which is composed of a high voltage (HV) stimulator and a low voltage (LV) neural front-end with active, spectral separation. The stimulator uses a supply of ±9V in order to achieve a high voltage compliance (VC), whereas the recorder has a supply voltage of 3 V for high power efficiency. By using a HV transistor to separate the two parts, a safe operation of stimulator and recorder with different supply voltages can be guaranteed. Thereby the presented architecture can deliver a maximum stimulation current of ±10mA with a dynamic range of 50 dB and a VC of ±8.2 V. The implemented recording part consumes 52 μW and achieves a simulated input referred noise of 2.5μVrms in the low frequency band from 0.1 Hz to 200 Hz and 3.1 μVrms in the high frequency band from 200 Hz to 7.5 kHz. The combined recorder/stimulator requires 0.378 mm2 per channel. A prototype of the interface has been implemented and manufactured in a standard 0.18 μm HV CMOS technology.
一种具有高电压顺应性和频谱分离性的双向神经接口集成电路
本文提出了一个完全集成的、双向的神经接口,它由一个高压刺激器和一个具有主动光谱分离功能的低压神经前端组成。刺激器使用±9V的电源,以实现高电压一致性(VC),而记录仪具有3 V的电源电压,以实现高功率效率。采用高压晶体管将两者分离,保证了在不同电源电压下刺激器和记录仪的安全运行。因此,该结构可以提供±10mA的最大刺激电流,动态范围为50 dB, VC为±8.2 V。所实现的记录部分功耗为52 μW,仿真输入参考噪声在0.1 Hz ~ 200 Hz的低频范围内为2.5μVrms,在200 Hz ~ 7.5 kHz的高频范围内为3.1 μVrms。组合记录器/刺激器每个通道需要0.378 mm2。该接口的原型已经在标准的0.18 μm HV CMOS技术上实现和制造。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 求助全文
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信