28nm 4Mb 1T-1MTJ STT-MRAM Circuits with Ultra-low Power Read Scheme

Abstract

4Mb 1T-1MTJ STT-MRAM based on 28nm CMOS process has been designed. To improve reading performance, a novel sense amplifier structure, achieving ultra-low power consumption, has been proposed. The read power consumption is as low as 1pJ/bit. The simulation results of the whole STT-MRAM chip demonstrate good performance.