Design of the printed circuit board for board level drop impact base on the JEDEC standard

Jian Gu, Y. Lei, Jian Lin, H. Fu, Zhong-wei Wu
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引用次数: 1

Abstract

the reliability of solder joint under drop impact is a crucial research area due to the smaller and higher density. The test standard for board level has been published by JEDEC in detail. Based on JEDEC board level drop test standard, the square board with four symmetry component is designed in this paper. The structure size of test board is 0.5mm×121mm×121mm. The distance of the center component to the center of test board is 15mm. The first six modal frequency is 23.56Hz, 136.37Hz, 138.53Hz, 165.98Hz, 346.35Hz and 394.56Hz respectively. This Design benefits for the board level drop life of solder joint statistics analysis. And the 0.5mm thickness design can be used as replacement test board to analyze the failure mechanism of solder joint under relative high drop impact level.
基于JEDEC标准的板级跌落冲击印刷电路板设计
由于焊点的体积更小、密度更高,焊点在跌落冲击下的可靠性是一个重要的研究领域。JEDEC详细发布了板级测试标准。本文根据JEDEC板水平跌落试验标准,设计了四对称分量的方板。试验板的结构尺寸为0.5mm×121mm×121mm。中心组件到测试板中心的距离为15mm。前六个模态频率分别为23.56Hz、136.37Hz、138.53Hz、165.98Hz、346.35Hz和394.56Hz。本设计有利于板级焊点跌落寿命的统计分析。0.5mm厚度设计可作为替换试验板,分析较高跌落冲击水平下焊点的失效机理。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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