A system-level design for foreground and background identification in 3D scenes

Abstract

This paper proposes a system-on-chip (SoC) FPGA - based real-time video processing platform for background and foreground identification. Background and foreground identification is a co mmon feature in many tasks in video content analytics (VCA), including object detection, tracking, segmentation and recognition. VCA is a relatively new field in video processing; it has generally been implemented using two chips, with the image signal processing (ISP) part in a DSP or an FPGA and the VCA part executed by a processor. However, a new generation of SoC FPGAs that incorporates a processor and an FPGA into a single chip makes it possible for a single chip to perform both ISP and VCA. This study details the hardware implementation of a real-time background and foreground identification algorithm in an SoC, including the capture, processing and display stages. The proposed platform uses photometric invariant color, depth data and local binary patterns (LBPs) to distinguish backgrounds from foregrounds. The system uses minimal cell resources and tries to implement modules using a pipeline technique.