Hybrid 14nm FinFET - Silicon Photonics Technology for Low-Power Tb/s/mm2 Optical I/O

2018 IEEE Symposium on VLSI Technology Pub Date : 2018-06-01 DOI:10.1109/VLSIT.2018.8510668

M. Rakowski, Y. Ban, P. De Heyn, N. Pantano, B. Snyder, S. Balakrishnan, S. Van Huylenbroeck, L. Bogaerts, C. Demeurisse, F. Inoue, K. Rebibis, P. Nolmans, X. Sun, P. Bex, A. Srinivasan, J. de Coster, S. Lardenois, A. Miller, P. Absil, P. Verheyen, D. Velenis, M. Pantouvaki, J. Van Campenhout

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引用次数: 32

Abstract

We demonstrate a microbump flip-chip integrated 14nm-FinFET CMOS-Silicon Photonics (SiPh) technology platform enabling ultra-low power Optical I/O transceivers with 1.6Tb/s/mm2 bandwidth density. The transmitter combines a differential FinFET driver with a Si ring modulator, enabling 40Gb/s NRZ optical modulation at 154fJ/bit dynamic power consumption in a 0.015mm2 footprint. The receiver combines a FinFET trans-impedance amplifier (TIA) with a Ge photodiode, enabling 40Gb/s NRZ photodetection with −10.3dBm sensitivity at 75fJ/bit power consumption, in a 0.01mm2 footprint. High-quality data transmission and reception is demonstrated in a loop-back experiment at 1330nm wavelength over standard single mode fiber (SMF) with 2dB link margin. Finally, a 4×40Gb/s, 0.1mm2 wavelength-division multiplexing (WDM) transmitter with integrated thermal control is demonstrated, enabling Optical I/O scaling substantially beyond 100Gb/s per fiber.

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混合14nm FinFET -低功耗Tb/s/mm2光I/O硅光子学技术

我们展示了一种集成14nm-FinFET cmos -硅光子学(SiPh)技术平台的微碰撞倒装芯片，可实现带宽密度为1.6Tb/s/mm2的超低功耗光I/O收发器。发射器结合了差分FinFET驱动器和硅环调制器，在0.015mm2的占地面积内以154fJ/bit的动态功耗实现40Gb/s NRZ光调制。该接收器结合了一个FinFET反阻抗放大器(TIA)和一个Ge光电二极管，在0.01mm2的占地面积内，以75fJ/bit的功耗和- 10.3dBm的灵敏度实现40Gb/s NRZ光电检测。在1330nm波长的环回实验中，在标准单模光纤(SMF)上进行了高质量的数据传输和接收，链路余量为2dB。最后，演示了具有集成热控制的4×40Gb/s、0.1mm2波分复用(WDM)发射机，使光I/O扩展大大超过每根光纤100Gb/s。

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2018 IEEE Symposium on VLSI Technology

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