Effect of underfill design parameters on die cracking in flip chip on flexible substrates

Abstract

The trends towards miniaturization in the electronics industry coupled with advances in flip chip technology have increased the use of flip chip on board or direct chip attach technology in many products. This is especially true for products where re-work is not an option. Reliability issues were overcome by the use of underfill to couple the chip to the substrate and subsequently significant advances were made in underfill technology to give options like traditional capillary flow underfills to no-flow and wafer level underfill materials and processes. While significant research has been conducted and published in the area of flip chip on organic substrates as well as on underfill technology, there is still a lot that needs to be done in the area of flip chip on flexible substrates. There is significant potential for flip chip on flexible substrates as it is demonstrated in many applications like implantable medical devices, hard disk drives etc. As we move from rigid to flexible substrates the thickness reduces from the standard 62 mil - 31 mil range to 10 mil - 4 mil range. The change in thickness also changes the reliability issues and failure modes as compared to flip chip on rigid organic substrates. In this paper, we have investigated the effect of underfill geometry (height and width of fillet) on die cracking during thermal cycling. Package is subjected to the -55°C to 125°C accelerated thermal cycling. A 3 Dimensional Finite Element Analysis model is created and used to computationally evaluate the effect of various parameters and draw inferences on die cracking in flip chip on flexible substrates.