Interconnection requirements and multi-die integration for FPGAs

A. Rahman, J. Schulz, R. Grenier, K. Chanda, M. Lee, D. Ratakonda, H. Shi, Z. Li, K. Chandrasekar, J. Xie, D. Ibbotson
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引用次数: 3

Abstract

Die stacking technology with high-density interconnect is enabling new product architectures and capabilities. Silicon interposer based stacking with through silicon via (TSV) has gained traction for high-performance applications. Some of the challenges in manufacturing technology, supply-chain strategy, design tools and infrastructure are being addressed to enable broader technology adoption. This paper provides an overview of Field Programmable Gate Array (FPGA) application trends which are driving the need for advanced die-stacking technologies. We present design and manufacturing considerations for stacking technologies and highlight lessons learned from a recent technology demonstration vehicle.
fpga的互连要求和多芯片集成
具有高密度互连的芯片堆叠技术使新的产品架构和功能成为可能。基于硅中间层的通硅通孔(TSV)堆叠技术在高性能应用中获得了广泛的应用。制造技术、供应链战略、设计工具和基础设施方面的一些挑战正在得到解决,以实现更广泛的技术采用。本文概述了现场可编程门阵列(FPGA)的应用趋势,这些趋势推动了对先进芯片堆叠技术的需求。我们介绍了堆叠技术的设计和制造考虑因素,并强调了从最近的技术演示车辆中吸取的经验教训。
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