A sub-half micron partially gate-to-drain overlapped MOSFET optimized for high performance and reliability

International Electron Devices Meeting 1991 [Technical Digest] Pub Date : 1991-12-08 DOI:10.1109/IEDM.1991.235411

I. Chen, R. Chapman, C. Teng

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引用次数: 3

Abstract

A partially gate-to-drain overlapped n-channel MOSFET using poly spacers was studied and compared to a fully overlapped and a conventional oxide spacer device in terms of performance and reliability. It is shown that, for a 500-AA partial overlap (flanked with 700-AA oxide spacer) device, the gate-to-drain overlap capacitance and simulated inverter delay are only 12% and 8%, respectively, higher than those of a conventional oxide spacer device. At a given performance level, the partial overlap device has two orders of magnitude longer DC hot-carrier lifetime than that of an oxide spacer device. The reason the overlapped device has high resistance to the hot-carrier stressing is the adverse oxide field at V/sub G/>

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亚半微米部分栅漏重叠MOSFET，优化了高性能和可靠性

研究了一种使用聚间隔片的部分栅极-漏极重叠n沟道MOSFET，并将其与完全重叠和传统氧化物间隔片器件的性能和可靠性进行了比较。结果表明，对于500-AA的部分重叠(两侧有700-AA的氧化物间隔器)器件，栅极-漏极重叠电容和模拟逆变器延迟分别仅比传统氧化物间隔器器件高12%和8%。在给定的性能水平下，部分重叠器件的直流热载子寿命比氧化物间隔器件长两个数量级。叠合器件具有较高的抗热载子应力性能的原因是在V/sub G/>处存在不利的氧化场

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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International Electron Devices Meeting 1991 [Technical Digest]

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