Fabrication of MFIS-FETs using PLZT/STO/Si(100) structures

E. Tokumitsu, R. Nakamura, H. Ishiwara
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Abstract

We report fabrication and characterization of p-channel metal-ferroelectric-insulator-semiconductor (MFIS)-FETs using the PLZT/STO/Si(100) structures and demonstrate nonvolatile memory operations of the MFISFETs. It is found that I/sub D/-V/sub G/ characteristics of PLZT/STO/Si MFIS-FETs show a hysteresis loop due to the ferroelectric nature of the PLZT film. It is also demonstrated that the I/sub D/ can be controlled by the "write" pulse, which was applied before the measurements, even at the same "read" gate voltage.
用PLZT/STO/Si(100)结构制备mfi - fet
我们报道了使用PLZT/STO/Si(100)结构的p沟道金属-铁电-绝缘体半导体(MFIS)- fet的制造和表征,并演示了mfisfet的非易失性存储操作。研究发现,由于PLZT薄膜的铁电性质,PLZT/STO/Si mfi - fet的I/sub D/-V/sub G/特性表现为磁滞回线。结果还表明,即使在相同的“读”栅极电压下,在测量之前施加的“写”脉冲也可以控制I/sub D/。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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