Jianguo Yang, Qingting Ding, Tiancheng Gong, Q. Luo, X. Xue, Zhaomeng Gao, Haoran Yu, Jie Yu, Xiaoxin Xu, Peng Yuan, Xiaoyan Li, L. Tai, S. Chung, H. Lv, Ming Liu
{"title":"Robust True Random Number Generator Using Stochastic Short-term Recovery of Charge Trapping FinFET for Advanced Hardware Security","authors":"Jianguo Yang, Qingting Ding, Tiancheng Gong, Q. Luo, X. Xue, Zhaomeng Gao, Haoran Yu, Jie Yu, Xiaoxin Xu, Peng Yuan, Xiaoyan Li, L. Tai, S. Chung, H. Lv, Ming Liu","doi":"10.1109/VLSITechnology18217.2020.9265048","DOIUrl":null,"url":null,"abstract":"In this work, we demonstrated a novel true random number generator (TRNG) utilizing stochastic short-term recovery of Charge- Trapping (CT) FinFET devices. The true random bits were generated by measuring the recovery time of CT-FinFET with a digital counter by a time-to-digital count converter (TDCC) unit. The resulting CT - TRNG circuit shows great immunity against a power noise of up to 600m V in amplitude and up to 1.5G Hz in frequency across a wide range of temperatures (-20 to 85°C). It passed all NIST 800–22 and NIST 800-90B randomness tests. We have shown this novel CT - TRNG to be the most promising high-reliability hardware security solution to date.","PeriodicalId":6850,"journal":{"name":"2020 IEEE Symposium on VLSI Technology","volume":"6 1","pages":"1-2"},"PeriodicalIF":0.0000,"publicationDate":"2020-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 IEEE Symposium on VLSI Technology","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSITechnology18217.2020.9265048","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3
Abstract
In this work, we demonstrated a novel true random number generator (TRNG) utilizing stochastic short-term recovery of Charge- Trapping (CT) FinFET devices. The true random bits were generated by measuring the recovery time of CT-FinFET with a digital counter by a time-to-digital count converter (TDCC) unit. The resulting CT - TRNG circuit shows great immunity against a power noise of up to 600m V in amplitude and up to 1.5G Hz in frequency across a wide range of temperatures (-20 to 85°C). It passed all NIST 800–22 and NIST 800-90B randomness tests. We have shown this novel CT - TRNG to be the most promising high-reliability hardware security solution to date.