Studies on Practical Low Complexity Decoding of Low-Density Parity-Check Codes

Abstract

This paper studies practical low complexity decoding of Low Density Parity-Check (LDPC) codes. We first investigate VLSI implementation issues of two state-of-the-art Weighted Bit Flipping (WBF) based decoding algorithms that were recently proposed in the literature. Then we present an optimized 2-bit soft decoding approach. It is shown that the proposed approach has comparable hardware complexity with either of the two WBF-based algorithms while it has significantly better decoding performance.