Model-based functional verification

Abstract

Just as digital design did 15 years ago; analog design has now readied a transition. The move to CMOS has made analog circuits more functionally complex, and that complexity leads naturally to functional errors in the designs, which in turn leads to respins and delays. And just as digital designers did 15 years ago, analog designers are beginning to realize that they need to employ a rigorous functional verification methodology. We present the basic concepts of analog verification that can be used to find a wide variety of functional errors in complex mixed-signal integrated circuits.