Investigation of Etching SIC VIAS for High Power Elctronics and Harsh Enviornment Mems

P. Mackowiak, K. Erbacher, M. Schiffer, H. Ngo, M. Schneider-Ramelow, K. Lang
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引用次数: 2

Abstract

This paper describes the research on the process development and process optimization of via etching of silicon carbide using reactive ion etching. The experiments were performed using a design of experiments (DOE) with a total 26 experiments and D-efficiency of over 85.4 finding the most significant process parameters impacting the etch result. Optimizing the process we could achieve etch depth of 200µm with an etch rate of up to 2µm/min. The ability of etching SiC with a high etch rate enables new application for harsh environments micro electromechanical systems (MEMS) and high power electronics.
大功率电子及恶劣环境微机电系统SIC过孔刻蚀研究
本文介绍了利用反应离子刻蚀法对碳化硅进行过孔刻蚀的工艺开发和工艺优化研究。采用实验设计(DOE)进行了26次实验,D-efficiency超过85.4,找到了影响蚀刻结果的最显著工艺参数。通过优化工艺,我们可以实现200 μ m的蚀刻深度,蚀刻速率高达2 μ m/min。具有高蚀刻速率的SiC蚀刻能力为恶劣环境的微机电系统(MEMS)和大功率电子设备提供了新的应用。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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