Linear Optimization for Memristive Device in Neuromorphic Hardware

Abstract

Memristors offer advantages as a hardware solution for neuromorphic computing, however, their nonlinear property makes the weight update difficult and reduces the accuracy of a neural network. A piecewise linear (PL) method is proposed in this paper to mitigate the nonlinear effect of memristors by calculating the weight update parameters along a piecewise line, which reduces errors in the weight update process. It is a simple but efficient method for the nonlinearity mitigation without reading the current conductance of the memristor in each updating, thereby avoiding complex peripheral circuits. The PL methods with respectively with 2-segment, 3-segment, and 4-segment models in two split points selection strategies are investigated, and the results show that under different nonlinearity, the PL method improves the recognition accuracy of MNIST handwriting digits to 87.87%-95.05%, as compared to 10.77%-73.18% of the cases without PL method. Finally, it concludes that the more segments in PL methods, the less weight deviation caused by the non-linearity of the synapse device.