Scaling and optimization of chip design for mini- and micro-LEDs

F. Hao, S. Karpov, R. Talalaev
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引用次数: 0

Abstract

Miniaturization of LED chip dimensions raises up numerous exploitation problems. At high current densities, both thermal droop and non-thermal droop caused by Auger recombination reduce the LED efficiency. At low current densities, a similar reduction originates from carrier surface recombination at the sidewalls of the chip. In addition, size-dependent current crowding and device self-heating interfere the main LED characteristics. Therefore, careful physics-based optimization of the LED design is necessary to make feasible development of the efficient mini- and micro-LEDs. Coupled electrical-thermal-optical simulations are applied to identify key mechanisms affecting the device performance, which is dependent on the chip size. The paper shows how modeling and simulation can serve for better understanding of mini- and micro-LED operation and for optimization of their designs and operation conditions.
微型和微型led芯片设计的缩放和优化
LED芯片尺寸的小型化提出了许多开发问题。在高电流密度下,由俄歇复合引起的热下垂和非热下垂都会降低LED的效率。在低电流密度下,类似的减少源于芯片侧壁的载流子表面重组。此外,尺寸相关的电流拥挤和器件自热会干扰LED的主要特性。因此,为了使高效的微型和微型LED的开发可行,必须对LED设计进行仔细的基于物理的优化。耦合电-热-光模拟应用于确定影响器件性能的关键机制,这取决于芯片尺寸。本文展示了如何建模和仿真可以更好地理解微型和微型led的工作和优化他们的设计和工作条件。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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