Xinghua Liu, Z. Ji, Deyu Tu, Liwei Shang, Ming Liu, Changing Xie
{"title":"Organic-inorganic hybrid circuit with organic memory and MOSFET","authors":"Xinghua Liu, Z. Ji, Deyu Tu, Liwei Shang, Ming Liu, Changing Xie","doi":"10.1109/INEC.2010.5424695","DOIUrl":null,"url":null,"abstract":"In this paper, the organic-inorganic hybrid circuit is demonstrated with the sandwiched structure of Au/poly(3,4-ethylene-dioxythiophene): polystyrenesulfonate/Au organic memory device and N-type MOSFET for nonvolatile memory application. The MOSFET is fabricated with 0.13-µm CMOS technology. One transistor and one resistor (1T–1R) structure is fabricated in this hybrid circuit, in which the transistor is used as a select cell to limit the compliance current. The compliance current is determined by the transistor's gate voltage, resulting in the control of electrical resistance of the filamentary conductive paths in the low resistive state. The resistive ratio between the ON- and OFF-state is on the order of 103.","PeriodicalId":6390,"journal":{"name":"2010 3rd International Nanoelectronics Conference (INEC)","volume":"23 1","pages":"641-642"},"PeriodicalIF":0.0000,"publicationDate":"2010-03-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2010 3rd International Nanoelectronics Conference (INEC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/INEC.2010.5424695","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
In this paper, the organic-inorganic hybrid circuit is demonstrated with the sandwiched structure of Au/poly(3,4-ethylene-dioxythiophene): polystyrenesulfonate/Au organic memory device and N-type MOSFET for nonvolatile memory application. The MOSFET is fabricated with 0.13-µm CMOS technology. One transistor and one resistor (1T–1R) structure is fabricated in this hybrid circuit, in which the transistor is used as a select cell to limit the compliance current. The compliance current is determined by the transistor's gate voltage, resulting in the control of electrical resistance of the filamentary conductive paths in the low resistive state. The resistive ratio between the ON- and OFF-state is on the order of 103.