Capacitor-based Cross-point Array for Analog Neural Network with Record Symmetry and Linearity

Y. Li, S. Kim, X. Sun, P. Solomon, T. Gokmen, H. Tsai, S. Koswatta, Z. Ren, R. Mo, C. Yeh, W. Haensch, E. Leobandung
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引用次数: 33

Abstract

We report a capacitor-based cross-point array that can be used to train analog-based Deep Neural Networks (DNNs), fabricated with trench capacitors in 14nm technology. The fundamental DNN functionalities of multiply-accumulate and weight-update are demonstrated. We also demonstrate the best symmetry and linearity ever reported for an analog cross-point array system. For DNNs, the capacitor leakage does not impact learning accuracy even without any refresh cycle, as the weights are continuously updated during training. This makes capacitor an ideal candidate for neural network training. We also discuss the scalability of this array using optimized low-leakage DRAM technology.
基于电容的记录对称线性模拟神经网络交叉点阵列
我们报告了一种基于电容器的交叉点阵列,可用于训练基于模拟的深度神经网络(dnn),该阵列由14nm技术的沟槽电容器制造。演示了多重累积和权重更新的基本深度神经网络功能。我们还证明了模拟交叉点阵列系统的最佳对称性和线性性。对于dnn,即使没有任何刷新周期,电容泄漏也不会影响学习精度,因为权重在训练过程中不断更新。这使得电容器成为神经网络训练的理想候选者。我们还讨论了该阵列使用优化的低泄漏DRAM技术的可扩展性。
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