{"title":"A novel processor architecture for high-performance stream processing","authors":"J. V. Lunteren","doi":"10.1109/HOTCHIPS.2006.7477868","DOIUrl":null,"url":null,"abstract":"This article consists of a collection of slides from the author's conference presentation on a novel processor architecture for high performance stream processing. Some of the specific topics discussed include: an introduction to the technology and applications supported; high-level concept design; programmable state machine; novel processor technologies; instructure cache ad prefetch; and experimental results for testing the performance output.","PeriodicalId":6666,"journal":{"name":"2015 IEEE Hot Chips 27 Symposium (HCS)","volume":"17 1","pages":"1-24"},"PeriodicalIF":0.0000,"publicationDate":"2006-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 IEEE Hot Chips 27 Symposium (HCS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/HOTCHIPS.2006.7477868","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
This article consists of a collection of slides from the author's conference presentation on a novel processor architecture for high performance stream processing. Some of the specific topics discussed include: an introduction to the technology and applications supported; high-level concept design; programmable state machine; novel processor technologies; instructure cache ad prefetch; and experimental results for testing the performance output.