A current mode maximum winner-take-all circuit with low voltage requirement for min-sum analog iterative decoders

Abstract

A new current-mode maximum winner-take-all (max WTA) circuit is presented. Inputs and output of the circuit are high swing, and voltage requirements for the inputs and the output are very low and just about V/sub eff/ (V/sub sat/) and 2 V/sub eff/ (2 V/sub sat/), respectively. Because of the cascode configuration, the proposed circuit shows very good precision even for short channel MOSFETs. Simulation results based on 0.13 /spl mu/m UMC CMOS technology are also presented. These results demonstrate the high-precision and low-voltage requirement of the circuit, which makes it a good choice for low-voltage min-sum analog iterative decoders and other soft computing applications.