Casta DIVA - a design for variability platform

Abstract

This paper introduces an architecture, Casta DIVA, which allows circuit and system designers to seamlessly incorporate design for variability in their designs to prevent large performance losses due to variations. The proposed architecture is generic as: (i) it takes into account all delay variation sources; (ii) applies solutions at design, test, and run time; (iii) and can be used as a template for all kind of systems, e.g., uni-processor, multi-processor. The Casta DIVA approach is introspective, that is, the system locally observes its own performance and adapts locally to the actual measured delay, by the use of local agents. To achieve global control too, the local agents are placed in a 3-level hierarchy. To reduce the extra hardware cost and to facilitate easy integration with existing design technologies we propose to utilize the JTAG boundary scan as test and communication infrastructure.