Feasibility of chipscale integration of single-photon switched digital loop buffer

Chip Pub Date : 2022-12-01 DOI:10.1016/j.chip.2022.100028
Xiaoxi Wang , Shayan Mookherjea
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引用次数: 2

Abstract

A strategy for realizing a microchip-scale single-photon digital loop buffer controlled by low-voltage electronic signals was studied in the context of integrated photonics. A potential implementation for bridging a gap between other technologies used a recirculating loop architecture based on advances in low-loss passive waveguides and a fast electro-optic add-drop switch. Although the requirements of single-photon buffers are demanding, our analysis suggested that a voltage-controlled, room-temperature catch-and-store short-term quantum memory for light on a chip may be feasible in certain regimes.

单光子开关数字环路缓冲器芯片级集成的可行性
在集成光子学的背景下,研究了一种由低压电子信号控制的单片机级单光子数字环路缓冲器的实现策略。利用基于低损耗无源波导和快速电光加丢开关的循环回路架构,有可能弥补其他技术之间的差距。尽管对单光子缓冲的要求很高,但我们的分析表明,在某些情况下,芯片上的电压控制、室温捕获和存储短期量子光存储器可能是可行的。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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来源期刊
CiteScore
2.80
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0.00%
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