{"title":"A Novel 32-Gb/s 5.6-Vpp Digital-to-Analog Converter in 100 nm GaN Technology for 5G Signal Generation","authors":"M. Weiß, C. Friesicke, R. Quay, O. Ambacher","doi":"10.1109/IMS30576.2020.9224080","DOIUrl":null,"url":null,"abstract":"The RF-power digital-to-analog converter (DAC) presented here provides RF-signals in the gigabit regime with voltage swings up to 8.32 V, suitable to drive subsequent single-stage microwave gallium nitride (GaN) power amplifer for sub-six frequencies. A current-steering architecture is driven by a custom algorithm to provide a programmable high output current, up to 250 mA, to a capacitive load such as the capacitive input impedance of an single-stage GaN power amplifier. This architecture provides data rates up to 32 Gb/s with an custom encoding, while the output voltage swing at the load capacitance is higher than 5 Vpp. Therefore, slew rates of up to 76 V/ns can be established.","PeriodicalId":6784,"journal":{"name":"2020 IEEE/MTT-S International Microwave Symposium (IMS)","volume":"37 1","pages":"952-955"},"PeriodicalIF":0.0000,"publicationDate":"2020-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 IEEE/MTT-S International Microwave Symposium (IMS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IMS30576.2020.9224080","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
The RF-power digital-to-analog converter (DAC) presented here provides RF-signals in the gigabit regime with voltage swings up to 8.32 V, suitable to drive subsequent single-stage microwave gallium nitride (GaN) power amplifer for sub-six frequencies. A current-steering architecture is driven by a custom algorithm to provide a programmable high output current, up to 250 mA, to a capacitive load such as the capacitive input impedance of an single-stage GaN power amplifier. This architecture provides data rates up to 32 Gb/s with an custom encoding, while the output voltage swing at the load capacitance is higher than 5 Vpp. Therefore, slew rates of up to 76 V/ns can be established.