A switched-current sample and hold circuit for low frequency applications

Abstract

A sample and hold circuit using the 0.6 /spl mu/m technology for low frequency application is presented. This circuit is based on a specific memory base cell that reduces the error caused by the output conductance. It works with a 3.3 V supply voltage, offers high-resolution and low power dissipation. Simulations results presented a -77.6 dB harmonic distortion and a 1.98 mW power dissipation for a 100 /spl mu/A biasing current, a 1.28 MHz sampling frequency, and a 10 kHz frequency input signal.