Sajay Bhuvanendran Nair Gourikutty, Kok Keng Chua, J. Alton, Jong Ming Chinq, Ratan Bhimrao Umralkar, V. Chidambaram, S. Bhattacharya
{"title":"Non-destructive fault isolation in through-silicon interposer based system in package","authors":"Sajay Bhuvanendran Nair Gourikutty, Kok Keng Chua, J. Alton, Jong Ming Chinq, Ratan Bhimrao Umralkar, V. Chidambaram, S. Bhattacharya","doi":"10.1109/EPTC50525.2020.9315038","DOIUrl":null,"url":null,"abstract":"The importance of IC packaging technologies within semiconductor manufacturing has increased dramatically over the last decade. Advanced packaging, including 2.5D ICs, is becoming more widely used due to its integrated functionality. However, due to the complexity of the advanced package architectures, it also poses challenges in localizing the defect, which is required for the successful investigation of faults. In this paper, an approach to accurately localize the failures in 2.5-D integrated system-in-package is presented. Two different case studies are discussed to demonstrate fault isolation, the first one with a short defect at the die, and the second one having an open defect at the substrate. The proposed method to locate faults rapidly with an accuracy of less than $10\\mu\\mathrm{m}$ will provide an effective solution for investigating yield-loss in advanced packages.","PeriodicalId":6790,"journal":{"name":"2020 IEEE 22nd Electronics Packaging Technology Conference (EPTC)","volume":"83 1","pages":"281-285"},"PeriodicalIF":0.0000,"publicationDate":"2020-12-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 IEEE 22nd Electronics Packaging Technology Conference (EPTC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EPTC50525.2020.9315038","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
The importance of IC packaging technologies within semiconductor manufacturing has increased dramatically over the last decade. Advanced packaging, including 2.5D ICs, is becoming more widely used due to its integrated functionality. However, due to the complexity of the advanced package architectures, it also poses challenges in localizing the defect, which is required for the successful investigation of faults. In this paper, an approach to accurately localize the failures in 2.5-D integrated system-in-package is presented. Two different case studies are discussed to demonstrate fault isolation, the first one with a short defect at the die, and the second one having an open defect at the substrate. The proposed method to locate faults rapidly with an accuracy of less than $10\mu\mathrm{m}$ will provide an effective solution for investigating yield-loss in advanced packages.