A method for SiC MOSFETs gate oxide degradation monitoring based on turn-on di/dt delay time

Abstract

This paper presents a method for SiC MOSFET gate oxide degradation monitoring based on turn-on di/dt delay time (di/dt-delay). The physical mechanism of turn-on di/dt shift with gate oxide degradation is first analyzed. Then, high-temperature gate bias tests are applied to two kinds of devices to accelerate gate oxide degradation. The aging test shows that turn-on di/dt-delay can be used as a precursor for SiC MOSFET gate oxide degradation with detectable amplitude shift. Subsequently, a di/dt-delay extraction circuit based on the parasitic inductance of SiC MOSFET power source pin is designed. Finally, the validity of the extraction circuit is verified by double-pulse tests.