A Hybrid PCB Verification Methodology with Geometrical Checks and Simulations

Abstract

As electronics products are increasing in complexity year by year, electrical engineers and designers are required to consider many more aspects to hand over their design to manufacturing. These include Safety standards, EMI and ESD, protocol specific standards, DFM (Designing for Manufacturing), and design guidelines provided by IC vendors. Tackling these challenges with simulations is a typical strategy. However, it is not always effective as it takes time to prepare the simulation model as well as the computational time, especially when incorporating 3dimensional electrical-magnetic simulations. This paper proposes a new design verification methodology that includes both rule based geometrical checking and the conventional simulations to improve the efficiency of the entire verification process.