A. Razavieh, V. Mahajan, W. L. Oo, S. Cimino, S. Khokale, K. Nagahiro, L. Pantisano, T. Ethirajan, J. Lemon, M. Gu, Y. Chen, H. Wang, T. H. Lee
{"title":"FinFET with Contact over Active-Gate for 5G Ultra-Wideband Applications","authors":"A. Razavieh, V. Mahajan, W. L. Oo, S. Cimino, S. Khokale, K. Nagahiro, L. Pantisano, T. Ethirajan, J. Lemon, M. Gu, Y. Chen, H. Wang, T. H. Lee","doi":"10.1109/VLSITechnology18217.2020.9265095","DOIUrl":null,"url":null,"abstract":"FinFET with contact over active-gate (COAG) is implemented on 12nm node technology platform to optimize the Maximum Oscillation Frequency $(F_{MAX})$) and the Minimum Noise Figure $(NF_{MIN}$ for devices with large fin numbers. This study shows that proposed COAG design can reduce the gate resistance of the 40-fin device by ~ 10- fold, while improving the $F_{MAX}$ by ~ 180% with comparable reliability performance to traditional FinFETs. Excellent DC and RF performances with $NF_{MIN}$ of 0.6dB at 26GHz and 3dB improvement in NF with $50\\mathrm{Q}$ source impedance $(NF_{50}$) over the 5-26GHz frequency range makes large fin number COAG FinFET an excellent candidate for variety of 5G sub-6GHz and mmWave applications in which high $\\mathrm{F}_{\\mathrm{MAX}}$ and low noise are critical.","PeriodicalId":6850,"journal":{"name":"2020 IEEE Symposium on VLSI Technology","volume":"14 1","pages":"1-2"},"PeriodicalIF":0.0000,"publicationDate":"2020-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 IEEE Symposium on VLSI Technology","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSITechnology18217.2020.9265095","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 6
Abstract
FinFET with contact over active-gate (COAG) is implemented on 12nm node technology platform to optimize the Maximum Oscillation Frequency $(F_{MAX})$) and the Minimum Noise Figure $(NF_{MIN}$ for devices with large fin numbers. This study shows that proposed COAG design can reduce the gate resistance of the 40-fin device by ~ 10- fold, while improving the $F_{MAX}$ by ~ 180% with comparable reliability performance to traditional FinFETs. Excellent DC and RF performances with $NF_{MIN}$ of 0.6dB at 26GHz and 3dB improvement in NF with $50\mathrm{Q}$ source impedance $(NF_{50}$) over the 5-26GHz frequency range makes large fin number COAG FinFET an excellent candidate for variety of 5G sub-6GHz and mmWave applications in which high $\mathrm{F}_{\mathrm{MAX}}$ and low noise are critical.