A Study to Reduce Molding Film Defects During Vacuum Lamination Process

Abstract

In this paper, an evaluation study was performed to reduce the epoxy molding film defects during vacuum lamination process. This epoxy mold film was vacuum laminated on fanout reconfigured silicon substrate; which was recognized as one of the key process step in fan-out wafer level packaging FO-WLP technology process flows. The key challenges to overcome by applying this process is to reduce the critical voids defects, seam line defects and film induced warpage which could lead to high yield loss if RDL layers build on top of this surface. This paper evaluated the effect of mold film preparation conditions and laminated substrate pre-treatment conditions on reducing the voids formations after lamination process. The maximum thickness of stacked mold film in correlating with film material properties was evaluated to meet the low warpage conditions for semiconductor process tool handling requirements. The optimized vacuum laminator process parameters such as vacuum process time, pressurization temperature and pressure was evaluated to achieve the significant reduction of voids, seam line and mold crack defects. These impacts and defects reduction trends in correlation with process parameters are useful to act as guidelines for defect issues troubleshooting, new material process parameters optimization and continuous process window improvement.