Fabrication and Characterization of ISC embedded Interposer for High Performance Interconnection

Won Ji Park, Min Guk Kang, J. Oh, Shaofeng Ding, Ji Hyung Kim, Jesse Hwang, Yun Ki Choi, Jung-Ho Park, Won Hyoung Lee, Seung Ki Nam, Seong Wook Moon, J. Youn, Jeonghoon Ahn
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引用次数: 1

Abstract

Interposer to interconnect between the electronic components has been developed for the last few decades because it can improve the system performance effectively, compared to the system with intra-chip wiring. In this paper, the integrated stack capacitor (ISC) embedded interposer system was demonstrated with the approximately 8 times higher capacitance (Ci) than interposer with MIM (Metal / Insulator / Metal capacitor). The resistance and leakage current were measured and the results indicate that there were no the open fail inside the system. In addition, WLR (Wafer Level Reliability) was proved using TDDB (Time Dependent Dielectric Breakdown), Vramp, HTS (High Temperature Storage), TC (Thermal Cycle) and Pre-con tests and finally, all requirements of WLR are satisfied.
用于高性能互连的ISC嵌入式中间层的制备与表征
在过去的几十年里,电子元件之间的互连被开发出来,因为与芯片内布线的系统相比,它可以有效地提高系统的性能。本文演示了集成堆叠电容器(ISC)嵌入式中间体系统,其电容(Ci)比MIM(金属/绝缘体/金属电容器)中间体高约8倍。测量了系统的电阻和漏电流,结果表明系统内部不存在开路故障。此外,通过TDDB (Time Dependent Dielectric击穿)、Vramp、HTS (High Temperature Storage)、TC (Thermal Cycle)和Pre-con测试验证了WLR(晶圆级可靠性),最终满足了WLR的所有要求。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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