{"title":"Design of a CORDIC processor for mixed-signal A/D conversion","authors":"M. Yeary, R. Fink, H. Sundaresan, D. Guidry","doi":"10.1109/IMTC.2001.928176","DOIUrl":null,"url":null,"abstract":"This paper proposes a new method which offers a high level of synchronization between a source, which is primarily digital, that generates a test signal and the ADC that will sample it. By using using a single clock to control the source, a clock divider may be used to derive a clock that will trigger an ADC at the appropriate times to produce a coherently sampled data set. Thus the timing of the waveform and the ADC will be accurately synchronized; moreover, since test time is a valuable commodity, a predictable number of clock cycles can be issued in order to generate a sampled data set. A computer simulation is given which fully characterizes the theoretical aspects of this paper. In addition, selected laboratory measurements are also given for discussion.","PeriodicalId":68878,"journal":{"name":"Journal of Measurement Science and Instrumentation","volume":"45 1","pages":"733-737 vol.2"},"PeriodicalIF":0.0000,"publicationDate":"2001-05-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"7","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Journal of Measurement Science and Instrumentation","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IMTC.2001.928176","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 7
Abstract
This paper proposes a new method which offers a high level of synchronization between a source, which is primarily digital, that generates a test signal and the ADC that will sample it. By using using a single clock to control the source, a clock divider may be used to derive a clock that will trigger an ADC at the appropriate times to produce a coherently sampled data set. Thus the timing of the waveform and the ADC will be accurately synchronized; moreover, since test time is a valuable commodity, a predictable number of clock cycles can be issued in order to generate a sampled data set. A computer simulation is given which fully characterizes the theoretical aspects of this paper. In addition, selected laboratory measurements are also given for discussion.