Optimizing X-Ray Inspection for Advanced Packaging Applications

B. Peterson, M. Kwan, F. Duewer, Andrew Reid, Rhiannon Brooks
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Abstract

Over the coming decade, advanced packaging will become increasingly critical to performance, cost, and density improvements in advanced electronics. There is both an industry push: cost and performance advances in transistor scaling are increasingly difficult. And there is an industry pull: customization for each market can be done far more quickly by assembling a series of parts in a package, rather than by design and integration into a single device. This isnt a new idea: Gordon Moore said the same in the 60’s. But after decades of increased device level integration, it is an important change. Figure 1 shows an example (future) device: there are large bumps, hybrid bonds--for extreme bandwidth and low latency connection to cache memory, TSV based DRAM, and multiple CPU to CPU interconnects. Each of these is a failure point. Figure 1: The wide variety of interconnects on future advanced packages Figure 2: the triangle of misery as applied to standard and Advanced xray imaging (AXI) Manufacturing will necessarily advance in the packaging arena: pin density and package size will both increase to support the high bandwidth and device integration demands. The downside of multiple device integration is a higher set of requirements on the reliability of both the individual devices and the fully assembled system. This is an opportunity to take advantage of new strategies and technologies in package inspection. The sampling challenges for both control and inspection for high reliability require systems that can run at 100% coverage and millions of units per year. An overview of reliability sampling challenges as it relates to the end of line inspection, as well as sampling for both defect type and incidence is critical to understanding how and what to measure to maximize yield. There are fundamental tradeoffs between speed, resolution, and signal to noise ratio that inform a systematic engineering understanding of inspection. Optimizing that trade-off specifically for semiconductor inspection leads to dedicated tools with extremely high resolution, speed, and low dose. In parallel with the speed requirements, sensitivity, and noise immunity can be improved with an understanding of the systematic sources of noise. These can be mitigated and even eliminated with novel algorithms for both image enhancement and defect location.
优化先进包装应用的x射线检测
在未来十年中,先进封装将对先进电子产品的性能、成本和密度改进变得越来越重要。这两者都有行业的推动:晶体管缩放的成本和性能进步越来越困难。而且还有一个行业的吸引力:通过将一系列部件组装在一个包装中,而不是通过设计和集成到单个设备中,可以更快地完成每个市场的定制。这不是一个新想法:戈登·摩尔在60年代也说过同样的话。但经过几十年的设备级集成,这是一个重要的变化。图1显示了一个示例(未来的)设备:有很大的凸起、混合绑定——用于极高带宽和低延迟连接到缓存内存、基于TSV的DRAM和多个CPU到CPU互连。每一个都是一个失败点。图2:应用于标准和先进x射线成像(AXI)制造的痛苦三角形必然会在封装领域取得进展:引脚密度和封装尺寸都将增加,以支持高带宽和器件集成需求。多设备集成的缺点是对单个设备和完全组装的系统的可靠性提出了更高的要求。这是一个利用包装检验新策略和新技术的机会。高可靠性控制和检测的采样挑战要求系统能够以100%的覆盖率和每年数百万个单位运行。对可靠性采样挑战的概述,因为它涉及到生产线末端检查,以及缺陷类型和发生率的采样,对于理解如何以及测量什么以最大化产量至关重要。在速度、分辨率和信噪比之间存在着基本的权衡,这些权衡告诉我们对检测的系统工程理解。专门针对半导体检测优化这种权衡,导致专用工具具有极高的分辨率、速度和低剂量。在满足速度要求的同时,对系统噪声源的了解可以提高灵敏度和抗扰度。这些问题可以通过图像增强和缺陷定位的新算法来减轻甚至消除。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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