{"title":"A class of random multiple bits within a byte error correcting codes with single byte error detecting capability for memory systems","authors":"G. Umanesan, E. Fujiwara","doi":"10.1109/ISIT.2002.1023391","DOIUrl":null,"url":null,"abstract":"We propose a class of codes called single t-bits within a b-bit byte error correcting-single b-bit byte error detecting (S/sub t/b/EC-S/sub b/ED) code for high speed semiconductor memory systems.","PeriodicalId":92129,"journal":{"name":"Proceedings. IEEE International Symposium on Information Theory","volume":"10 1","pages":"119-"},"PeriodicalIF":0.0000,"publicationDate":"2002-06-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings. IEEE International Symposium on Information Theory","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISIT.2002.1023391","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
We propose a class of codes called single t-bits within a b-bit byte error correcting-single b-bit byte error detecting (S/sub t/b/EC-S/sub b/ED) code for high speed semiconductor memory systems.